发明名称 METHOD FOR FORMING BIT LINE OF SEMICONDUCTOR DEVICE
摘要 PURPOSE: A method for forming a bit line of a semiconductor device is provided to prevent the generation of local stepped portions and the generation of bridges by implanting additionally P+ ions on the entire surface of a wafer. CONSTITUTION: A word line pattern, a plug(117), a P+ S/D region(121), an N+ S/D region(123) are formed on a semiconductor substrate. An interlayer dielectric(119) is formed thereon. A contact hole is formed by etching the interlayer dielectric to expose the P+ S/D region(121). P+ impurity ions are additionally implanted into the interlayer dielectric. A contact hole is formed by etching the interlayer dielectric(119) to expose the N+ S/D region(123). A contact hole is formed by etching the interlayer dielectric to expose the plug(117). A barrier metal layer(129) is formed on the interlayer dielectric. A tungsten layer(131) is formed on the barrier metal layer(129). A tungsten bit line is formed by etching the tungsten layer(131) and the barrier metal layer.
申请公布号 KR20040006763(A) 申请公布日期 2004.01.24
申请号 KR20020041144 申请日期 2002.07.15
申请人 HYNIX SEMICONDUCTOR INC. 发明人 JIN, SEONG GON;NOH, JAE SEON
分类号 H01L21/28;H01L21/302;H01L21/461;H01L21/768;H01L21/8242;(IPC1-7):H01L21/28 主分类号 H01L21/28
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