发明名称 ADD-COMPARE-SELECT DEVICE AND METHOD OF VITERBI ALGORITHM
摘要 PURPOSE: An add-compare-select device and a method of Viterbi algorithm are provided to simplify the hardware by performing an unsigned operation for comparing the size of path metric as well as for updating the path metric, thereby reducing the number of gates. CONSTITUTION: An add-compare-select device and a method of Viterbi algorithm includes an adder block, a comparator block and a selector block. After the adder calculates the branch metric for each input, these adder updates the path metric by adding the calculated branch metric to the path metric previously accumulated. The comparator performs the exclusive-or operation for the upper most bit of the plurality of path metric inputted through the adder. After the comparator performs the unsigned operation for the remained bits except the upper most bits of the plurality of path metric, it compares the sizes of the plurality of path metrics by performing the exclusive or operation for the two performed results. The selector selects the minimum path metric among a plurality of path metrics in response to the result of the comparator to output the selected result.
申请公布号 KR20040006658(A) 申请公布日期 2004.01.24
申请号 KR20020040998 申请日期 2002.07.13
申请人 LG ELECTRONICS INC. 发明人 SHIN, JONG UNG
分类号 H03M13/41;(IPC1-7):H03M13/41 主分类号 H03M13/41
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