发明名称 Electronic circuit with test unit for testing interconnects
摘要 A test arrangement for testing the interconnections of an electronic circuit ( 100 ) and a further electronic circuit is provided. A first selection of I/O nodes ( 120 ), which are arranged to receive input data in a functional mode of the electronic circuit ( 100 ), and which are coupled to a test unit in a test mode of the electronic circuit ( 100 ). The test unit has a combinatorial circuit ( 160 ) for implementing a multiple-input XOR or XNOR gate. The test unit also provides interconnections between the first selection of I/O nodes ( 120 ) and a second selection of I/O nodes ( 130 ) via logic gates ( 141-144 ). These interconnections increase the interconnect test coverage of the electronic device ( 100 ), because the interconnects with the further electronic circuits that are associated with I/O nodes ( 131-134 ) become testable as well.
申请公布号 AU2003244975(A8) 申请公布日期 2004.01.23
申请号 AU20030244975 申请日期 2003.06.20
申请人 KONINKLIJKE PHILIPS ELECTRONICS N.V. 发明人 LEON M. A. VAN DE LOGT;FRANCISCUS G. M. DE JONG
分类号 G01R31/28;G01R31/316;G01R31/3185;G11C29/02;H01L21/822;H01L27/04;(IPC1-7):G01R31/318 主分类号 G01R31/28
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