PROGRAMMABLE LOGIC APPARATUS

摘要

PROBLEM TO BE SOLVED: To allow a programmable logical apparatus to be partly restructured with holding an active state of connection with an external unit. SOLUTION: A buffer logic block 73 logically processes data inputted from a demultiplexer 72 and outputs such output data based on the PCI standard to a multiplexer 71 that a PCI I/F 6 is in an idle state waiting for logic process results by an FPGA 1. COPYRIGHT: (C)2004,JPO