| 摘要 |
PROBLEM TO BE SOLVED: To acquire logic element connection information in which the number of pins to be newly generated in a connection destination module is small, and alternate wiring is small. SOLUTION: The least significant module among modules including all additional elements selected from change instruction information is defined as a module under processing, and modules including elements to which the additional elements are connected are extracted one by one from underlayer modules included in the module under processing, and evaluation points at the time of arranging the additional elements are calculated (steps ST1 to ST3). When modules whose evaluation points have positive values are present (step ST4: Yes), the module whose evaluation point is the highest(any one module when there are a plurality of such modules) is defined as the module under processing (steps ST to ST3). When only modules whose evaluation points are not more than 0 are found (a step ST4: No), the module under processing at that time is defined as an arrangement destination module (a step ST6). COPYRIGHT: (C)2004,JPO
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