| 摘要 |
A bi-layer resist process. A layer to be etched is provided on a substrate. The layer to be etched is coated with a bottom silicon-containing resist layer. The bottom silicon-containing resist layer is baked. The bottom silicon-containing resist layer is treated to form a silicon oxide layer on a surface of the bottom silicon-containing resist layer. The silicon oxide layer is coated with a top resist layer. The top resist layer is baked. The top resist layer is exposed to light and developed to form a pattern in the top resist layer. The pattern is transferred through the silicon oxide layer to the bottom resist layer.
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