发明名称 OPTIMUM POWER AND GROUND BUMP PAD AND BUMP PATTERNS FOR FLIP CHIP PACKAGING
摘要 Previously, drilled vias were formed in multilayer substrates, interconnecting all layers. The positioning of flip chip bump pads on the substrate has been non-determinate. With the more recent use of microvias, which connect only two adjacent layers, non-determinate positioning of bump pads results in inefficient connection and reduces the routing efficiency and electrical performance. By designating the position of the power and ground bump pads on the substrate, microvias connect the bump pads directly to the related power or ground plane. Similarly signal bump pads can be directly connected to signal planes, giving improved routing and electrical performance. The signal, power and ground bump pads are in sequential rows, to match the relative positioning of the signal, power and ground planes.
申请公布号 WO03049183(A3) 申请公布日期 2004.01.22
申请号 WO2002IB05023 申请日期 2002.11.27
申请人 KONINKLIJKE PHILIPS ELECTRONICS N.V. 发明人 LOO, MIKE, C.
分类号 H01L23/498;H01L23/50;H05K1/02;H05K1/11;H05K3/46 主分类号 H01L23/498
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