| 摘要 |
A low-power sleep mode of operation for a frequency hopping radio receiver is presented. Digital circuits within the receiver operate based upon a high frequency clock source. During sleep mode, the circuits are clocked with a low-frequency clock source, which is typically less accurate in frequency. Periodically, the receiver awakens. The hop sequence channel tuned by the receiver is determined by a mapping based upon the channel upon which the receiver expects to receive communications. The mapping can be changed as necessary to improve tolerance to timing error. Furthermore, once communications are received after a sleep period, the frequency error of the low-frequency clock source can be determined, and compensated for after awakening from subsequent sleep periods.
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