发明名称 Semiconductor memory device having a gate electrode and a method of manufacturing thereof
摘要 A first aspect of the present invention is providing a semiconductor memory device having a gate electrode, comprising a memory cell having the gate, a source electrode, and a drain electrode; and a layer formed above the memory cell, the layer comprising at least one of: 1) a silicon oxide layer to which nitrogen are doped, 2) a silicon oxide layer to which aluminum are doped, 3) an aluminum oxide layer, 4) a silicon oxide layer to which titanium are doped, 5) a silicon oxide layer to which two of nitrogen, aluminum, and titanium are doped, 6) a silicon oxide layer to which nitrogen, aluminum, and titanium are doped, 7) a titanium oxide layer, 8) a titanium and aluminum oxide layer, 9) a simple metal layer comprising one of Ti, Ni, Co, Zr, Cu, Pt, V, Mg, U, Nd, La, and Sc, 10) an alloy layer comprising at least two of Ti, Ni, Co, Zr, Cu, Pt, V, Mg, U, Nd, La, and Sc, and the at least two of Ti, Ni, Co, Zr, Cu, Pt, V, Mg, U, Nd, La, and Sc being included 50% or more, 11) a nitrogenous layer of the alloy layer, and 12) a hydrogenated layer of the alloy layer.
申请公布号 US2004013009(A1) 申请公布日期 2004.01.22
申请号 US20030396463 申请日期 2003.03.26
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 TSUNODA HIROAKI;KOBAYASHI HIDEYUKI;HIMENO YOSHIAKI;SHIBA KATSUYASU;FUKUHARA JOTA
分类号 H01L21/8247;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):G11C7/00 主分类号 H01L21/8247
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