| 摘要 |
A contrast adjusting circuit used in a PDP display so as to prevent the image from being whitish by suppressing the rise of the luminance at low level when the contrast is heightened and to optimally adjust the contrast of the image always varying with time. The circuit comprises an average luminance calculating section (12), an LUT (14), and an output video data calculating section (16), wherein the average luminance calculating section(12) determines the average luminance level APL for n frame images from the input video data X (X>=0) on the X - Y coordinate system, the LUT (14) determines central value data Xc, Yc from the APL, and the output video data calculating section (16) determines the output video data Y (Y>=0) collected after the contrast is adjusted according to the calculation formula Y = A . X + Yc - A . Xc where A (A>0) is the slope variably set for contrast adjustment, whereby the rise of the luminance at low level when the A is increased and contrast is heightened is suppressed to adjust the contrast corresponding to the APL for frame images. <IMAGE> |
