发明名称 Method for measuring system clock signal frequency variations in digital processing systems
摘要 A method for measuring system clock signal frequency variations is disclosed, whereby the number of search operations can be limited to log2n, where n is the number of elements (signal values) within the sliding window used. A binary tree is used to sort the minimum value. A condition imposed for the binary tree is that the signal values for both the children elements are greater than or equal to the signal value for the parent element. As such, each element of the binary tree contains a signal value and a flag that indicates which of the two children elements contains the smallest signal value. The element at the root of the tree contains the smallest signal value for the entire tree. Whenever a new signal value for an element is retrieved, the new signal value replaces the oldest signal value in the elements involved. The element containing the oldest signal value can be located anywhere in the tree.
申请公布号 US6681200(B2) 申请公布日期 2004.01.20
申请号 US20010795231 申请日期 2001.02.26
申请人 TELEFONAKTIEBOLAGET LM ERICSSON (PUBL) 发明人 ZEE OSCAR
分类号 H03H17/02;(IPC1-7):H04B15/00 主分类号 H03H17/02
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