| 摘要 |
PURPOSE: A method for forming test pattern of a semiconductor device and its structure are provided to prevent abnormal failure due to current crowding and to reduce the area of test pattern by forming a via hole in a current tab. CONSTITUTION: A test pattern structure comprises an interconnection pattern, a current tab(28), and a test pad(26) for applying test current. The interconnection pattern is provided with an upper and lower interconnection(20,22) and a via(24) for connecting the upper and lower interconnection. The current tab(28) connects to the upper interconnection(20) and has a via hole(30).
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