发明名称 METHOD FOR MANUFACTURING STACK GATE FLASH MEMORY CELL
摘要 PURPOSE: A method for manufacturing a stack gate flash memory cell is provided to improve room retention by removing trap center in a sidewall oxide layer of a floating gate. CONSTITUTION: A stacked gate(314) is formed by sequentially forming a tunnel oxide layer, a floating gate, a dielectric film, a control gate, a silicide layer and a hard mask on a substrate(300). An oxide layer(316) is formed at both sidewalls of the floating gate and the control gate. An HTO(High Temperature Oxide) layer(318) is formed at sidewalls of the stacked gate. The first silicon nitride layer(320) is deposited on the HTO layer. A source/drain region is formed in the substrate. After depositing the second silicon nitride layer on the resultant structure and patterning the resultant structure, a spacer including the HTO layer, the first and second silicon nitride layer is then formed.
申请公布号 KR20040005475(A) 申请公布日期 2004.01.16
申请号 KR20020040051 申请日期 2002.07.10
申请人 HYNIX SEMICONDUCTOR INC. 发明人 JUN, YU NAM;LEE, GEUN U;PARK, SEONG GI;YOO, YEONG SEON
分类号 H01L21/8247;(IPC1-7):H01L21/824 主分类号 H01L21/8247
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