| 摘要 |
PROBLEM TO BE SOLVED: To provide a data communicator which immediately stabilizes a receive-side clock, while in a long-period PLL adjustment immune to the residual jitters, even if the input is switched. SOLUTION: The communicator comprises a buffer memory 21 for storing time reference information (PCR) extracted from input signals 5; a buffer memory 22 for storing data information other than the time reference information of the input signals 5; a reference time counter 14 operative with a clock outputted from a voltage-controlled oscillator 12 fed with a clock from a crystal oscillator 16 via a phase-locked circuit; and a time information comparaison section 23 for comparing the time reference information on the buffer memory 21 with a system time information (STC) 15 of the reference time counter and, if equal, generating a read control signal 26 for controlling the reading on the buffer memory 22. COPYRIGHT: (C)2004,JPO
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