| 摘要 |
A single stack bipolar logic AND gate for low power applications comprising: a first differential pair of transistors, each transistor of the first differential pair having base, emitter and collector terminals, a base of a first transistor of the first differential pair receiving an input signal A and a base of the second transistor of the first differential pair receiving its complement signal {overscore (A, the emitters of each transistor of the first differential pair being connected at a common node to a first constant current source; a second differential pair of transistors, each transistor of the second differential pair having base, emitter and collector terminals, a base of a first transistor of the second differential pair receiving an input signal B and a base of the second transistor of the second differential pair receiving its complement signal {overscore (B, the emitters of each transistor of the second differential pair being connected at a common node to a second constant current source; and, a common voltage power supply source, the collector terminal of each first transistor of the first and second differential pairs being connected to the common voltage power supply source through a first resistance and defining a complement output node of the AND gate, and the collector terminal of each second transistor of the first and second differential pair being connected to the common voltage power supply source through a second resistance and additionally defining an output node of the AND gate, wherein the second resistance is greater than the first resistance.
|
