发明名称 Method of forming stacked gate for flash memories
摘要 The method of the present invention includes the steps of forming doped regions in the semiconductor substrate. A pad oxide layer is formed on the semiconductor substrate. A masking layer is formed on the pad oxide layer. A masking layer, the pad oxide layer and the semiconductor substrate are patterned to form a trench therein. A gap-filling material is refilled into the trench and over the semiconductor substrate. A portion of the gap-filling material is removed to an upper surface of the masking layer. Next step is to remove the masking layer. A first conductive layer is formed along the surface of the substrate, then removing a portion of the first conductive layer to expose an upper surface of the gap-filling material. An inter polysilicon dielectric layer is formed on the first conductive layer and a second conductive layer is formed on the inter polysilicon dielectric layer.
申请公布号 US6677224(B2) 申请公布日期 2004.01.13
申请号 US20010976823 申请日期 2001.10.12
申请人 TSENG HORNG-HUEI 发明人 TSENG HORNG-HUEI
分类号 H01L21/762;H01L21/8247;H01L27/115;(IPC1-7):H01L21/320;H01L21/476 主分类号 H01L21/762
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