| 摘要 |
PURPOSE: A method and circuit are provided to determine the precision of a bitline voltage distribution test in an FeRAM(Ferroelectric Random Access Memory) device. CONSTITUTION: In the device, an integrated circuit(100) includes a control circuit(110), memory array segments(120), sense amplifiers(130), a reference voltage generator(140), output drivers(150), a precharge circuit(160) for global I/O bus(165), a compression circuit(170), I/O circuits and pads(180), and a parameter adjustment circuit(190). Control circuit(110) is a state machine or other well-known type of control circuit that generates control signals for operation of integrated circuit(100). In a test mode of integrated circuit(100), control circuit(110) controls memory array segments(120), sense amplifiers(130), and reference voltage generator(140) as required to measure the bit line voltages read out of a set of memory cells or measure voltage offsets of sense amplifiers(130). Control circuit(110) also controls compression circuit(170), which compresses the measurement results.
|
