发明名称 Memory controller for controlling an integrated memory undergoing logical state transitions
摘要 A controller and a control method of an integrated memory provided in a system LSI used in television receiver or other video appliance are disclosed. In the memory controller of the invention, when a clock signal suspend command signal not synchronized with a synchronization signal is entered, a suspend command signal synchronized with the synchronization signal is generated. The clock signal supplied in the integrated memory is suspended according to a synchronized suspend command signal. Since the clock signal supply is suspended only while the integrated memory is in idling state, the power consumption of the system LSI can be saved without breaking down the integrated memory.
申请公布号 US6678832(B1) 申请公布日期 2004.01.13
申请号 US19990430538 申请日期 1999.10.29
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. 发明人 GOTANDA CHIKARA
分类号 G06F13/16;H04N5/44;H04N5/63;(IPC1-7):G06F1/32 主分类号 G06F13/16
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