发明名称 |
High aspect ratio PBL SiN barrier formation |
摘要 |
In a process for preparing a DT DRAM for sub 100 nm groundrules that normally require the formation of a collar after the bottle formation, the improvement of providing a collar first scheme by forming a high aspect ration PBL SiN barrier, comprising:a) providing a semiconductor structure after SiN node deposition and DT polysilicon fill;b) depositing a poly buffered LOCOS (PBL) Si liner;c) subjecting the PBL liner to oxidation to form a pad oxide and depositing a SiN barrier layer;d) depositing a silicon mask liner;e) subjecting the DT to high directional ion implantation (I/I) using a p-dopant;f) employing a selective wet etch of unimplanted Si with an etch stop on SiN;g) subjecting the product of step f) to a SiN wet etch with an etch stop on the pad oxide;h) affecting a Si liner etch with a stop on the pad oxide;i) oxidizing the PBL Si liner and affecting a barrier SiN strip;j) providing a DT polysilicon fill and performing a poly chemical mechanical polishing.
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申请公布号 |
US6677197(B2) |
申请公布日期 |
2004.01.13 |
申请号 |
US20010032040 |
申请日期 |
2001.12.31 |
申请人 |
INFINEON TECHNOLOGIES AG |
发明人 |
KUDELKA STEPHAN;TEWS HELMUT HORST |
分类号 |
H01L21/20;H01L21/334;H01L21/336;H01L21/44;H01L21/8242;(IPC1-7):H01L21/824 |
主分类号 |
H01L21/20 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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