发明名称 REFRESH PERIOD CONTROL CIRCUIT OF VOLATILE MEMORY DEVICE AND REFRESH METHOD USING THE SAME
摘要 PURPOSE: A refresh period control circuit of a volatile memory device and a refresh method using the same are provided to optimize a refresh period and prevent current consumption by an unnecessary refresh operation, by reading high data stored in a capacitor of the volatile memory. CONSTITUTION: A control circuit(20) outputs a precharge signal, an address generation signal, a write driver driving signal, a sense amplifier driving signal and a refresh command generator driving signal according to an inputted signal. A number of transistors are connected to the first bit line. A number of capacitors are connected to the above transistors respectively. A number of transistors are connected to the second bit line, and a number of capacitors are connected to the above transistors respectively. An equalization circuit(10) precharges the first and the second bit line as an equal potential according to the precharge signal during an initial operation. A decoder(30) generates an address to select the transistor connected to the first bit line selectively according to the address generation signal. A write driver(40) outputs a source power to store charges in the capacitor connected through the first bit line according to the write driver control signal. A sense amplifier(50) senses a potential difference between the first and the second bit line according to the sense amplifier driving signal. And a refresh command generator(60) generates a refresh command according to the refresh command generator driving signal and an output signal of the sense amplifier.
申请公布号 KR20040003899(A) 申请公布日期 2004.01.13
申请号 KR20020038726 申请日期 2002.07.04
申请人 HYNIX SEMICONDUCTOR INC. 发明人 LEE, GEUN IL
分类号 G11C11/403;(IPC1-7):G11C11/403 主分类号 G11C11/403
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