发明名称 System and method to improve IC fabrication through selective fusing
摘要 A system and methodology for fabricating integrated circuits (ICs) on wafer die monitors at a subset of die one or more parameters that can affect the performance capabilities of associated ICs. One or more respective parameters for unmeasured die are derived based on one or more of the measured parameter. Fuses are selectively set for ICs at each die location based on parameters associated with each respective die location, thereby configuring the respective ICs accordingly.
申请公布号 US2004006755(A1) 申请公布日期 2004.01.08
申请号 US20020189047 申请日期 2002.07.02
申请人 SWANSON LELAND;HOWARD GREGORY E. 发明人 SWANSON LELAND;HOWARD GREGORY E.
分类号 H01L21/66;H01L23/544;(IPC1-7):G06F17/50;H01L21/44 主分类号 H01L21/66
代理机构 代理人
主权项
地址