发明名称 |
MICROPROCESSOR AND METHOD OF OPERATING MICROPROCESSOR |
摘要 |
<p><P>PROBLEM TO BE SOLVED: To reduce the power consumption of a microprocessor, and to enhance the function of the microprocessor. <P>SOLUTION: This data processor has a plurality of sub-circuits 36 and 38, and a clock pulse generating circuit 84 for generating a clock signal therein. A detecting circuit detects the assertion of a control signal, and a disable circuit disables the clock signal to one or more of the sub-circuits 36 and 38 in response to the control signal. A circuit for separating one or more of the sub-circuits selectively from an accessory input and output pin to impart compatibility with a desirable microprocessor architecture by separating the pin. <P>COPYRIGHT: (C)2004,JPO</p> |
申请公布号 |
JP2004005747(A) |
申请公布日期 |
2004.01.08 |
申请号 |
JP20030303418 |
申请日期 |
2003.08.27 |
申请人 |
NATIONAL SEMICONDUCTOR CORP |
发明人 |
MAHER ROBERT D;GARIBAY JR RAUL A;HERUBIN MARGARET R;BLUHM MARK |
分类号 |
G06F15/78;G06F1/04;G06F1/32;G06F9/30;G06F9/38;G06F13/40;(IPC1-7):G06F15/78 |
主分类号 |
G06F15/78 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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