| 摘要 |
One embodiment of the present invention provides a system that facilitates speculative execution of instructions within a computer system. Upon encountering a stall during execution of an instruction stream, the system synchronizes a cache containing data that is being operated on by the instruction stream. Next, the system configures the cache so that the cache operates as before except that changes to cache lines are not propagated to lower levels of the memory system. The system then speculatively executes a subsequent portion of the instruction stream without waiting for the event that caused the stall to be resolved. In this way, the speculative execution can only change data within the cache, and these changes are not propagated to lower levels of the memory system unless a subsequent commit operation takes place.
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