32-BIT GENERAL-PURPOSE ASYNCHRONOUS BUS INTERFACE USING READING AND WRITING STROBE BYTE ENABLE

摘要

PROBLEM TO BE SOLVED: To provide a display controller having a 32-bit general purpose asynchronous bus interface using a reading and writing strobe byte enable. SOLUTION: The display controller constituted to communicate with an asynchronous bus interface microprocessor operates at a first clock rate and the microprocessor operates at a second clock rate. The display controller has a memory core for holding the displayed image data and a register set holding the configuration data enabling display of the image data. It also has an asynchronous bus interface enabling communication between the memory core of the display controller and the microprocessor with a bus. The asynchronous bus interface is constituted not to be influenced either by the second clock rate of the microprocessor or by the difference between the first clock rate and the second clock rate. COPYRIGHT: (C)2004,JPO