| 摘要 |
PROBLEM TO BE SOLVED: To control access timing between a central processing unit and a peripheral unit thereof without enlarging the whole system nor bringing cost-up thereof. SOLUTION: The access timing between the central processor and the peripheral unit thereof is controlled, based on operation timing of the peripheral units (ROM 5, back-up memory 6, devices 7 and 8) described in a time table (Fig.3). COPYRIGHT: (C)2004,JPO
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