| 摘要 |
In an apparatus for testing an on-chip ROM and a method thereof, an on-chip ROM comprises a test control signal generator which, by using external test signals, including a test mode signal that sets the mode of the ROM to a test mode, a test clock signal which generates a clock used in testing the ROM, and a test reset signal for initialization, generates a ROM clock signal to operate the ROM and test control signals including a ROM address to access the ROM; a comparator which compares ROM data read from the ROM in response to the ROM address with external reference data; and a test result accumulator which, referring to the comparison result from the comparator, stores information related to whether an error exists, as a test result. If the comparison of the ROM data is performed to the last ROM address, the test result is externally output. By embedding the on-chip ROM test apparatus in a semiconductor chip and externally providing only minimal information, the possible exposure of ROM data stored in the ROM can be prevented. Also, according to the apparatus and method, information related to the ROM address at which an error occurred can be provided together with the test result and by feeding the ROM address information back to the manufacturing process, product yield can be improved. |
