| 摘要 |
A determining section ( 18 ) and gain variation amount detecting section ( 9 ) detect a period having a possibility of a DC-component offset in an internal circuit of a direct conversion receiver increasing beyond an allowable value due to AGC operation, and during the period, a cut-off frequency of each of high-pass filters ( 12 a to 12 d) is set at a frequency higher than that in general operation, thereby rapidly converging transient responses of signals passed through the high-pass filters, while controlling precisely operation timings of reception power measuring section ( 16 ), gain calculating section ( 22 ), gain control section ( 23 ) and circuit power supply control section ( 24 ) composing an AGC loop, whereby the DC offset is prevented from increasing and stable circuit operation is assured. It is thereby possible to achieve further reductions in size and power consumption of a CDMA receiver using the direct conversion receiver. |
