发明名称 DUAL DAMASCENE ETCHING METHOD OF SEMICONDUCTOR DEVICE
摘要 PURPOSE: A dual damascene etching method of a semiconductor device is provided to be capable of improving the burial characteristic of a via hole and preventing the generation of loss at the upper portion of the via hole when carrying out the following trench etching process by using a double organic BARC(Bottom Anti-Reflective Coating). CONSTITUTION: After sequentially forming a diffusion barrier(13) and a low dielectric constant interlayer dielectric(14) at the upper portion of a semiconductor substrate(11) having a lower metal line(12), a via hole is formed at the resultant structure by selectively etching the interlayer dielectric. The first and second organic BARCs(17,18) having a different viscosity with each other, are sequentially formed at the upper portion of the resultant structure for filling the via hole.
申请公布号 KR20040001473(A) 申请公布日期 2004.01.07
申请号 KR20020036689 申请日期 2002.06.28
申请人 HYNIX SEMICONDUCTOR INC. 发明人 HONG, EUN SEOK
分类号 H01L21/3205;(IPC1-7):H01L21/320 主分类号 H01L21/3205
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