| 摘要 |
PURPOSE: A method for forming a damascene pattern of a semiconductor device is provided to reduce particles considerably when forming the damascene pattern by forming a predetermined barrier pattern at the upper portion of a copper layer. CONSTITUTION: After defining a cell region(A) and an alignment key region(B) at a lower layer(100), a copper layer(110) is formed at the upper portion of the cell region. Then, a barrier is formed on the entire surface of the resultant structure. A barrier pattern(125) is formed by selectively etching the barrier of the cell region. After depositing an insulating layer at the upper portion of the barrier pattern, a damascene pattern and an alignment key pattern are formed by selectively etching the resultant structure.
|
