发明名称 METHOD FOR FABRICATING METAL INTERCONNECTION BY DUAL DAMASCENE PROCESS
摘要 PURPOSE: A method for fabricating a metal interconnection by a dual damascene process is provided to form the profile of a desired etch target by forming the first silylation layer on the first photoresist layer pattern and by forming the second silylation layer on the second photoresist layer pattern in the same method as the first silylation layer. CONSTITUTION: An interlayer dielectric(23) is formed on a semiconductor substrate(21) having an underlying layer. The first photoresist layer pattern(25) corresponding to a contact region is formed on the interlayer dielectric. The first silylation layer(27) is formed on the first photoresist layer pattern. The second photoresist layer pattern(29) corresponding to the metal interconnection is formed on the first silylation layer. The first silylation layer is formed on the second photoresist layer pattern. The second silylation layer(31) and the first silylation layer not covered with the second silylation layer are removed while the interlayer dielectric is etched to define a contact hole region. The photoresist layer pattern not covered with the first silylation layer is eliminated. The first silylation layer and the interlayer dielectric not covered with the first silylation layer are etched to form a trench for the metal interconnection and a contact hole exposing the substrate. The photoresist layer pattern is removed. A metal layer is deposited on the resultant structure to fill the contact hole and the trench. The metal layer is planarized to form the metal interconnection until the interlayer dielectric is exposed.
申请公布号 KR20040002151(A) 申请公布日期 2004.01.07
申请号 KR20020037590 申请日期 2002.06.29
申请人 HYNIX SEMICONDUCTOR INC. 发明人 HYUN, YUN SEOK;LEE, DONG HO
分类号 H01L21/28;(IPC1-7):H01L21/28 主分类号 H01L21/28
代理机构 代理人
主权项
地址