| 摘要 |
PURPOSE: A method for manufacturing a semiconductor device is provided to be capable of decreasing the thickness of an interlayer dielectric without a signal delay phenomenon and improving device characteristics by using a low dielectric FSG layer as the interlayer dielectric. CONSTITUTION: A plurality of gates(3) are formed at the upper portion of a silicon substrate. A diffusion barrier(4) is formed on the entire surface of the resultant structure. An interlayer dielectric is formed at the upper portion of the diffusion barrier. A planarization process is carried out at the surface of the interlayer dielectric. A plurality of contact holes(6) are formed at the resultant structure by selectively etching the interlayer dielectric and the diffusion barrier for partially exposing the silicon substrate. Preferably, the interlayer dielectric is formed by depositing an FSG layer(5) on a USG layer.
|
