Semiconductor structure having elevated salicided source/drain regions and metal gate electrode on nitride/oxide dielectric

摘要

A semiconductor structure and a process for its manufacture. First and second gate dielectric layers are formed on a semiconductor substrate between nitride spacers, and a metal gate electrode is formed on the gate dielectric layers. Lightly-doped drain regions and source/drain regions are disposed in the substrate and aligned with the electrode and spacers. A silicide contact layer is disposed over an epitaxial layer on the substrate over the source/drain regions. The metal gate electrode is aligned using a polysilicon alignment structure, which permits high temperature processing before the metal is deposited.