| 摘要 |
A clocked comparator circuit (eg., 11) compares the primary (eg., VDD) and backup (eg., VBAT) power supply voltages to a system. When the primary voltage falls a given amount below the backup, the circuit provides a signal (eg., VISO) that may be used to switch to the backup power supply. When the primary voltage is again present, the circuit can switch back to primary power. Alternatively, or additionally, a signal (eg., ENA) may be generated to initiate graceful shutdown of the system. The clock to the comparator typically operates at a higher frequency when operating on the primary voltage, and a lower frequency when operating on the backup voltage. This circuit is typically used with a portable system that uses a rechargeable battery as its primary power supply. The backup power supply may be a long-life battery that provides power to only a portion of the system. For example, in a computer, only a static memory may be powered by the backup, to allow the full system to retain its proper configuration when the primary power supply is again activated. The circuit may be implemented with all digital logic, typically CMOS, thus minimizing power dissipation and increasing its versatility. <IMAGE> |
