发明名称 Capacitive folding circuit for use in a folding/interpolating analog-to-digital converter
摘要 An M-bit folding/interpolating analog-to-digital converter (ADC) circuit, comprising a reference voltage generator, a converter, an interpolator, an amplifying stage, a comparator, and an encoder. The converter has an amplifier that receives at least one of a plurality of first reference voltage signals and outputs a plurality of coarse bits. The converter also has N-number of folding blocks, which output a plurality of folded signals. Each folding block comprises a plurality of capacitors, a differential amplifier and a feedback element. The folded signals output by the converter are then interpolated, amplified, compared and output as a plurality of fine bits. The encoder receives the coarse and fine bits and outputs the digital signal.
申请公布号 US6674389(B2) 申请公布日期 2004.01.06
申请号 US20020071252 申请日期 2002.02.11
申请人 BROADCOM CORPORATION 发明人 BULT KLAAS
分类号 H03M1/20;H03M1/36;(IPC1-7):H03M2/36 主分类号 H03M1/20
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