发明名称 Halbleitervorrichtung mit verbessertem Elektrodenanschlussaufbau
摘要 1,191,093. Semi-conductor devices. HITACHI Ltd. 27 Jan., 1969 [29 Jan., 1968], No. 4479/69. Heading H1K. A semi-conductor circuit chip is mounted on a metal plate carried by an insulating substrate on which are disposed a plurality of external leads which extend beyond its periphery. An electrical connection is made between an area of the plate not underlying the chip and one of the leads, and other connections between the remaining leads and electrodes on the top face of the chip. In one example the chip contains a number of silicon IGFETS the diffused source regions of which are short-circuited to the substrate at the upper face so that voltage can be supplied to them through the thickness of the wafer from the plate. Normally the chip 6 (Fig. 2) is gold alloyed to the plate 3 which is then attached to substrate 1 via a layer 2 of low-melting glass. Typically, the metal plate is of nickel or iron-nickel-cobalt alloy, the leads of similar alloy faced with aluminium and the wires 7 of aluminium. In this case an aluminium layer 5 is provided on the plate to facilitate thermocompression bonding of the wires. If gold wires are used layer 5 may be an extension of the gold-bonding layer 4. A plate with a number of layers 4 and 5 may be formed by depositing aluminium over the plate, photoresist etching to restrict it to certain areas, depositing gold on the remaining areas, forming grooves to separate the two metals and then stamping to subdivide the plate. If after etching the assembly is heated the photoresist will flow over the sides of the islands of aluminium and thus isolate them from the gold so that the grooves appear on removal of the photo-resist.
申请公布号 DE1904118(A1) 申请公布日期 1969.08.28
申请号 DE19691904118 申请日期 1969.01.28
申请人 HITACHI LTD. 发明人 SUZUOKA,TAKAYUKI
分类号 H01L23/12;H01L23/057;H01L23/13;H01L23/498 主分类号 H01L23/12
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