| 摘要 |
Advantage is taken of the presence of ordinary parity check bits occurring in the data flow in a computer or other information-handling system to improve error correction capability while at the same time providing simpler decoding. More particularly, the encoding and decoding system, methods, and devices herein include the capability of separating error correction in data bits and in parity check bits. In this regard, it is noted that the present invention therefore provides an improved memory system in which the parity check bits do not have to be stripped off prior to storage of data into a memory system with error correction coding redundancy built in. Instead of these parity check bits being stripped off, they are incorporated into a generalized and generalizable error correction system which produces a significantly simple decoding and error correction structure. The system provides for SEC-DED code capabilities while at the same time providing capabilities for correcting multiple odd numbers of errors occurring in distinct groups. Accordingly, the present invention provides encoding and decoding systems and methods, and a correspondingly improved memory system.
|
