Barrier metal oxide interconnect cap in integrated circuits

摘要

An integrated circuit and manufacturing method therefor is provided having a semiconductor substrate with a semiconductor device. A device dielectric layer formed on the semiconductor substrate. A channel dielectric layer on the device dielectric layer has an opening formed therein. A barrier layer lines the channel opening. A conductor core fills the opening over the barrier layer. An interconnect cap is disposed over the conductor core and seed layer and is capped with a capping layer. The interconnect cap is preferably of an indium oxide compound.