发明名称 Flip-chip integrated circuit routing to I/O devices
摘要 Tile-based routing between a bump pad and an input/output (I/O) device for implementation on a flip-chip integrated circuit (IC) die. A trace is routed between the bump pad and a position corresponding to a first I/O slot, the first I/O slot being at least partially occupied by the I/O device. A position is obtained for a device pad for the I/O device. The trace is then extended into an area corresponding to the position obtained for the device pad. It is a feature of this aspect of the invention that the trace extension extends the trace into a pad area for a second I/O slot, the second I/O slot being at least partially occupied by the I/O device. The invention also concerns a flip-chip integrated circuit (IC) die that includes a bump pad, an input/output (I/O) device, and a device pad electrically connected to the I/O device and disposed vertically adjacent to a portion of the I/O device. Also provided is an electrically conductive trace, including a first portion between the bump pad and a first position, the first position corresponding to a portion of the I/O device and being horizontally offset from the device pad, and also including a second portion between the first position and a second position corresponding to the device pad.
申请公布号 US6674166(B2) 申请公布日期 2004.01.06
申请号 US20010765827 申请日期 2001.01.19
申请人 LSI LOGIC CORPORATION 发明人 RAO RAMOJI KARUMURI;LIANG MIKE
分类号 H01L23/50;H01L23/528;(IPC1-7):H01L23/48 主分类号 H01L23/50
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