发明名称 INTEGRATED INDUCTANCE
摘要 An inductance device in monolithic structure is formed from a first metallization level layer of lower parallel conductive lines extending along the inductance pattern; next, on a second level, a set of vias is formed over each underlying conductive line being associated with at least two vias; and in a third metallization level, upper conductive lines interconnected to the underlying conductive lines by means of vias, the lower and upper conductive lines being shifted with respect to one another to ensure the electric continuity.
申请公布号 EP1374307(A1) 申请公布日期 2004.01.02
申请号 EP20020730351 申请日期 2002.04.05
申请人 STMICROELECTRONICS S.A. 发明人 BORET, SAMUEL
分类号 H01F17/00;H01L23/522;H01L23/528;H01L23/64;(IPC1-7):H01L23/64 主分类号 H01F17/00
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