发明名称 |
Techniques for utilization of asymmetric secondary processing resources |
摘要 |
A processor having asymmetric secondary processing resources. One disclosed embodiment includes a first execution resource to perform a first function and a second execution resource that also performs the second function, although the second processing resource is asymmetric to the first resource in that it has a lower throughput than the first processing resource. Switching logic switches execution from the first processing resource to the second processing resource in a reduced power consumption mode.
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申请公布号 |
US2004003309(A1) |
申请公布日期 |
2004.01.01 |
申请号 |
US20020184557 |
申请日期 |
2002.06.26 |
申请人 |
CAI ZHONG-NING;LIM CHEE HOW |
发明人 |
CAI ZHONG-NING;LIM CHEE HOW |
分类号 |
G06F1/20;G06F1/32;(IPC1-7):G06F1/26 |
主分类号 |
G06F1/20 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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