发明名称 |
Memory interface with fractional addressing |
摘要 |
A memory interface device (100) providing a fractional address interface between a data processor (104) and a memory system (102) and a method for retrieving intermediate data values from a memory system using fractional addressing. The device includes an address generator (108) for generating first and second memory addresses, the first memory address being less than or equal to a specified fractional address, the second memory address being greater than or equal to the fractional address. The device also includes a memory access unit (110) coupled to the address generator (108) for retrieving first and second data values from the memory system (102) at the first and second memory addresses, respectively. The device also includes a data access unit (112) for interpolating between the first and second data values and passing the interpolated value to the data processor (104). The memory interface has application in a variety of data processing systems, including digital signal processors and streaming vector processors.
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申请公布号 |
US2004003199(A1) |
申请公布日期 |
2004.01.01 |
申请号 |
US20020184582 |
申请日期 |
2002.06.28 |
申请人 |
MAY PHILIP E.;MOAT KENT DONALD;ESSICK RAYMOND B.;CHIRICESCU SILVIU;LUCAS BRIAN GEOFFREY;NORRIS JAMES M.;SCHUETTE MICHAEL ALLEN;SAIDI ALI |
发明人 |
MAY PHILIP E.;MOAT KENT DONALD;ESSICK RAYMOND B.;CHIRICESCU SILVIU;LUCAS BRIAN GEOFFREY;NORRIS JAMES M.;SCHUETTE MICHAEL ALLEN;SAIDI ALI |
分类号 |
G06F9/345;G06F9/355;G06F12/00;G06F12/04;(IPC1-7):G06F12/00 |
主分类号 |
G06F9/345 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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