发明名称 |
Multiple logical bits per memory cell in a memory device |
摘要 |
A semiconductor substrate is provided over which electrically conductive columns are formed along with electrically conductive rows crossing over the electrically conductive columns. A plurality of memory components are formed each having a resistance value corresponding to multiple logical bits and non-volatile memory cells are each formed by connecting a memory component between an electrically conductive row and an electrically conductive column.
|
申请公布号 |
US2004002193(A1) |
申请公布日期 |
2004.01.01 |
申请号 |
US20030611544 |
申请日期 |
2003.07.01 |
申请人 |
SMITH KENNETH K.;BRANDENBERGER SARAH M.;BLOOMQUIST DARREL R.;ELDREDGE KENNETH J.;VAN BROCKLIN ANDREW L.;FRICKE PETER J. |
发明人 |
SMITH KENNETH K.;BRANDENBERGER SARAH M.;BLOOMQUIST DARREL R.;ELDREDGE KENNETH J.;VAN BROCKLIN ANDREW L.;FRICKE PETER J. |
分类号 |
G11C11/56;(IPC1-7):H01L21/336;H01L21/823 |
主分类号 |
G11C11/56 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|