Digital summing phase-lock loop circuit with sideband control and method therefor

摘要

A digital summing phase-lock loop circuit with sideband control provides high accuracy and high speed acquisition in a multi-loop frequency synthesizer. A digital phase comparator is used to control a voltage-controlled oscillator in response to inputs from multiple external loops. An initial sweep condition is set by a sweep control circuit to provide resolution of lock ambiguities in the multiple external loops. Sideband selection may be performed by selecting on of an inverted or non-inverted output of the digital phase comparator.