发明名称 COPLANAR INTEGRATION OF LATTICE-MISMATCHED SEMICONDUCTOR WITH SILICON VIA WAFER BONING VIRTUAL SUBSTRATES
摘要 A method of bonding lattice-mismatched semiconductors is provided. The method includes forming a Ge-based virtual substrate and depositing on the virtual substrate a CMP layer that forms a planarized virtual substrate. Also, the method includes bonding a Si substrate to the planarized virtual substrate and performing layer exfoliation on selective layers of the planarized virtual substrate producing a damaged layer of Ge. Furthermore, the method includes removing the damaged layer of Ge.
申请公布号 WO2004001810(A2) 申请公布日期 2003.12.31
申请号 WO2003US20054 申请日期 2003.06.25
申请人 MASSACHUSETTS INSTITUTE OF TECHNOLOGY 发明人 PITERA, ARTHUR, J.;FITZGERALD, EUGENE, A.
分类号 H01L21/20;H01L21/762 主分类号 H01L21/20
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