| 摘要 |
PURPOSE: A circuit for controlling the bitline equalization signal of a semiconductor memory is provided to overcome the failure of connection junction and the reliability problem of the semiconductor memory device by preventing the voltage rising of the clamping voltage(VextCLP). CONSTITUTION: A circuit for controlling the bitline equalization signal of a semiconductor memory includes a driving circuit(108) and a clamp voltage controller(200). The driving circuit(108) outputs the bitline equalization signal by driving the clamp voltage and the ground voltage switched by the external voltage. The clamp voltage controller(200) stabilizes the outputs of the bitline equalization signal by clamping the clamp voltage with the external voltage during the test mode. And, the circuit for controlling the bitline equalization signal of a semiconductor memory drives the bitline equalization signal for controlling the bitline equalization circuit.
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