发明名称 Semiconductor integrated circuit device
摘要 A digital arithmetic operation circuit includes a plurality of arithmetic operation blocks, a control signal generator and a selector. The plurality of arithmetic operation blocks receive a plurality of digital input signals and perform different arithmetic operations on the received digital input signals, in parallel, to output operation result signals. The a control signal generator receives a plurality of digital input signals and generates a control signal based on the digital input signals. The selector selects one of the operation result signals, in response to the control signal, to output the selected operation result signal. After the control signal generator supplies the control signal to the selector, the selector outputs the selected operation result signal as soon as the selected operation result signal is supplied to the selector.
申请公布号 US6671112(B2) 申请公布日期 2003.12.30
申请号 US20010023769 申请日期 2001.12.21
申请人 FUJITSU LIMITED 发明人 MURAKAMI HIROKO;SAWADA MASARU;NAKANO MANABU;KIKUTA KAZUYOSHI
分类号 G11B5/012;G11B5/55;G11B5/596;H03L7/091;H03L7/099;(IPC1-7):G11B5/09;G11B5/00 主分类号 G11B5/012
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