| 摘要 |
A method of writing data into a semiconductor memory device including a memory cell to which a power supply potential and a ground potential are provided is disclosed. The method may include generating a negative voltage (GNDL) lower than the ground potential and providing complementary data signals to a bit line pair when writing data to a memory cell wherein the low one of the complementary data signals is essentially the negative voltage. In this way, compensation for a potential increment which may be caused due to a wiring resistance, or the like, of a bit line (BL1) may be provided.
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