发明名称 Stack-less, CPU-less creation of valid SNMP-trap packets
摘要 A device, such as an Application Specific Integrated Circuit (ASIC) which has access to a memory, such as non-volatile RAM (NVRAM) or Electrically Erasable Programmable Read Only Memory (E<2>PROM). The device may reside in a PC or on a network interface card for providing an interface between the PC and a network, such as an Ethernet-based network. Software on the PC constructs a base packet or template for an SNMP trap PDU and stores the template into the NVRAM or E<2>PROM associated with the device. When the device determines the need to generate and send the SNMP trap PDU, the device can, without a CPU and without a full implementation of network layer software stacks, generate the SNMP trap PDU based on the base packet stored in the NVRAM. The device need only insert the non-static data into the packet built from the base packet before sending the packet to a communication controller, such as an Ethernet controller, which subsequently sends the packet over a network, such as the Ethernet-based network.
申请公布号 US6671722(B1) 申请公布日期 2003.12.30
申请号 US19990349244 申请日期 1999.07.08
申请人 INTEL CORPORATION 发明人 STACHURA THOMAS L.;VASUDEVAN ANIL
分类号 H04L12/24;(IPC1-7):G06F15/173 主分类号 H04L12/24
代理机构 代理人
主权项
地址