发明名称 Multi-node data processing system having a non-hierarchical interconnect architecture
摘要 A data processing system includes a plurality of nodes, which each contain at least one agent, and data storage accessible to agents within the nodes. The plurality of nodes are coupled by a non-hierarchical interconnect including multiple non-blocking uni-directional address channels and at least one uni-directional data channel. The agents, which are each coupled to and snoop transactions on all of the plurality of address channels, can only issue transactions on an associated address channel. The uni-directional channels employed by the present non-hierarchical interconnect architecture permit high frequency pumped operation not possible with conventional bi-directional shared system buses. In addition, access latencies to remote (cache or main) memory incurred following local cache misses are greatly reduced as compared with conventional hierarchical systems because of the absence of inter-level (e.g., bus acquisition) communication latency. The non-hierarchical interconnect architecture also permits design flexibility in that the segment of the interconnect within each node can be independently implemented by a set of buses or as a switch, depending upon cost and performance considerations.
申请公布号 US6671712(B1) 申请公布日期 2003.12.30
申请号 US19990436898 申请日期 1999.11.09
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 ARIMILLI RAVI KUMAR;FIELDS, JR. JAMES STEPHEN;GUTHRIE GUY LYNN;JOYNER JODY BERN;LEWIS JERRY DON
分类号 G06F13/42;G06F15/16;(IPC1-7):G06F15/16 主分类号 G06F13/42
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