| 摘要 |
An R1 register 101 receives predetermined data of the IP header of an original IP packet, an R2 register receives the predetermined data of the IP header obtained by fragment-processing a packet obtained by dividing the original IP packet, and an R3 register receives portions of the IP header of the original IP packet. An arithmetic circuit 104 subtracts values in the R2 register 102 from a value in the R1 register 101. An arithmetic circuit 105 subtracts a predetermined value from one of the values in the R3 register 103 and recalculates another value in the R3 register 103 corresponding to a change of said one of the value. An arithmetic circuit 106 generates a new value by adding a result of arithmetic operation of the arithmetic circuit 104 and the recalculated value obtained by the arithmetic circuit 105 to each other, and introduces this result into the R3 register 103 or another register.
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